By adopting a new voltage-withstanding structure consisting of a series of alternately arranged P-type and N-type semiconductor thin layers, a superjunction device has an advantage that both P-type and N-type regions can be fully depleted at a relative low voltage in an off-state, thereby exhibiting a high breakdown voltage even if the P-type and N-type doping regions have a much higher impurity concentration than a conventional device. Therefore, a superjunction MOSFET (metal oxide semiconductor field effect transistor) may simultaneously achieve a high breakdown voltage and a low on-resistance. Its device performance may surpass the performance limit of a conventional MOSFET.
A superjunction MOSFET is formed by a plurality of cells arranged in a repeated way in an active area. As the cells in a superjunction device have the same structure, no breakdown issue will arise between adjacent cells because the voltage between adjacent cells is zero in the horizontal direction. However, for a cell arranged at the border of the active area, a huge voltage difference may exist between such a cell and the substrate in the horizontal direction, which may lead to a breakdown. Generally, such a voltage difference is withstood by using a special structure called terminal structure, and therefore, a terminal structure is very important for a device with high breakdown voltage.
Currently, there are many terminal techniques designed for high voltage VDMOS, such as guarding ring technique, field plate technique (including floating field plate and resistance field plate), junction terminal extension, etc. However, the mechanism of lateral voltage withstanding in a superjunction device is quite different from the mechanism in a conventional VDMOS or a conventional diode. It is necessary to design new terminal structures for a superjunction device.